The present invention relates to broadband telecommunications. More particularly, the present invention relates to a Class-AB amplifier for a line driver in a broadband telecommunications system.
FIG. 1 illustrates a typical circuit structure of a Class-AB amplifier 10 used for a line driver in broadband telecommunications such as digital subscriber line systems (xDSL). As shown in FIG. 1, the amplifier 10 is of an inverting-type and includes a pre-amplifier (pre-amp) 12, error amplifiers 14a, 14b, 15a, and 15b, and an output stage having large-sized output devices 16a, 16b, 18a, and 18b in a closed loop configuration. The output stage includes large complementary common source devices driven by the corresponding pair of the error amplifiers. An input signal (Vin) is amplified through these three stages and output as an output signal (Vo). Because of the push-pull nature of the Class-AB amplifier structure, both the error amplifiers 14b and 14b driving the n-channel output devices and the error amplifiers 14a and 15a driving the p-channel output devices are provided.
Linearity and power dissipation are key performance figures of a line driver. In a line driver employing a class AB amplifier, such as the line driver 10, the main source of the nonlinearity is distortion incurred by the output devices which experience the largest voltage swing in the circuit. To the first order, the closed-loop nonlinearity is determined by the output device distortion divided by an open loop gain:                               HD          Closedloop                ≈                              HD                          output              ⁢                              -                            ⁢              devices                                                          A              preamp                        xc3x97                          A              EA                        xc3x97                          gm                              output                ⁢                                  -                                ⁢                devices                                      xc3x97            RL                                              (        1        )            
where HD stands for the harmonic distortion, Apreamp is a gain of the preamplifier, AEA is a gain of the error amplifier, gm output-devices is the transconductance of the output devices, and RL is an equivalent load impedance. In the case of the line driver for a transmission line (with a resistance Rline) coupled through a transformer having a turns ratio of n, the equivalent load impedance RL is Rline/n2.
Accordingly, in order to effectively suppress the distortion caused by the output devices, a high open-loop gain (the denominator of Equation (1)) is desirable. The required open-loop gain depends on the level of nonlinearity generated by the output devices plus the additional nonlinearities produced by the preamplifier and the error amplifiers. To realize a large open loop gain, the gain of each amplifier stage in the signal path, i.e., the pre-amp gain, the error amplifier gain, and the gain from the output devices, are typically maximized as much as possible, while maintaining stability.
In a line-driver circuit employing class-AB output stage, a quiescent current in the output devices must be well controlled. The quiescent current is basically the operating supply current of the amplifiers, and is required to bias the internal circuitry (such as output devices) of the amplifiers regardless of existence of an input signal. Thus, the quiescent current adds to the power consumption of the amplifier, and designing for a very low quiescent current significantly reduces the power dissipation. On the other hand, however, in order to obtain a low distortion and/or high linearity performance of the amplifier, an additional biasing current (i.e., a larger quiescent current) is typically required. In such a case, if the quiescent current has a large variation, it degrades the linearity of the amplifier. A large quiescent current variation also results in excess power dissipation.
The primary source of a quiescent current variation is the input-referred offset voltage (xcex94V) of the error amplifiers. Since a quiescent current variation (xcex94IQ/IQ) is proportional to the offset voltage and the gain of the amplifier, the error amplifier gain cannot be made arbitrarily large. The offset of the error amplifier, which largely depends on the process and matching of transistors, is statistical in nature and considered random. Such a random offset of the error amplifier causes a random variation in an offset voltage (xcex94V).
FIG. 2A schematically illustrates a typical output stage 20 including a pair of error amplifiers 22a and 22b, a p-channel output device (MP) 24a, and an n-channel output device (MN) 24b. The input-referred offset voltage of the error amplifier 22a, which drives the output device 24a, is considered and modeled as a small voltage source (Voffset) at the input of the error amplifier 22a. The maximum quiescent current variation xcex94IQ/IQ is estimated to be:                                           Δ            ⁢                          xe2x80x83                        ⁢                          I              Q                                            I            Q                          ≈                              2            ⁢                          V              offset                        ⁢                          A              EAP                                                          (                                                V                  GS                                -                                  V                  T                                            )                        MP                                              (        2        )            
where AEAP corresponds to the DC gain of the error amplifier 22a. 
Assuming a maximum offset voltage (Voffsetmax) of the error amplifier 22a is about 3 mV, a gate overdrive voltage (VGSxe2x88x92VT)MP of the output device 24a is about 150 mV, and allowing a 40% fluctuation of the quiescent current (xcex94IQ/IQ), from expression (2), it is found that the open-loop gain (amplification factor) of the error amplifier must be constrained to about 8 to 10 or less. More detailed discussion in the context of an integrated services digital network (ISDN) application is found in xe2x80x9cA CMOS Line Driver with 80-dB Linearity for ISDN Application,xe2x80x9d H. Khorramabadi., JSSC, vol. 27, no. 4, April 1992. Therefore, without controlling the quiescent current, the gain of the error amplifiers has to be limited to around 18 dB-20 dB due to a large quiescent current variation caused by a random offset voltage of the error amplifiers.
FIGS. 2B and 2C schematically illustrate the quiescent current (Iq) variations where an offset voltage of the error amplifiers has xc2x13 mV fluctuation. As shown in FIG. 2B, when the error amplifiers have a large amplification factor (high gain), the offset voltage creates a significant quiescent current variation. On the other hand, as shown in FIG. 2C, when the error amplifiers have a small amplification factor (low gain), the corresponding quiescent current variation is also small.
One approach to solve the offset problem of the error amplifier is to monitor the quiescent current and adjust the offset voltage using a quiescent control circuit in negative feedback configuration. For example, a quiescent control circuit for ISDN applications with moderate linearity level has been reported in xe2x80x9cA 3.3 V, Low-Distortion ISDN Line Driver with a Novel Quiescent Current Control Circuit,xe2x80x9d H Casier, et al., JSSC vol. 33, No. 7, July 1998. FIG. 3A schematically illustrates an on-chip portion of the reported line driver 30 having a quiescent current control circuit 32. The line driver 30 includes the first stage amplifiers (pseudo-differential preamplifier) 34a and 34b, error amplifiers 36a and 36b, and output devices 38a and 38b. 
FIG. 3B schematically illustrates the circuit structure of the quiescent current control circuit 32. According to this conventional approach, the gain of the error amplifiers can be increased higher than 20 dB without generating a large quiescent current variation. However, this method has several crucial disadvantages for use in the broadband communications where a much higher linearity and signal to noise ratio (SNR), a higher data rate, and a wider bandwidth are required.
First, since the quiescent current control (negative feedback) is performed using a control clock with a control frequency, the quiescent current control circuit 32 makes the DC wander having the control frequency. In order to reduce the DC wander effect, a large low pass filter (capacitor) 40 is required, as shown in FIG. 3B. This low-pass filtering to mask the control frequency also limits the available bandwidth for the data transmission. Second, since the quiescent current control employs a negative feedback loop 42, it may cause a stability problem and reduce the overall gain of the open loop signal gain. In addition, since the conventional quiescent control involves switching operation (with switches 44) during the normal operation of the line driver, it inherently introduces switching noises and/or cross-talk into the data signal processing. Thus, a careful circuit design and layout is required to prevent such switching noises. Furthermore, the conventional quiescent control block contributes to extra power dissipation, increasing the required power for the line driver operation.
Accordingly, it would be desirable to reduce the quiescent current variation due to amplifier offset while maintaining a sufficient bandwidth and good linearity of the overall amplifier without adding a complex control circuit, extra power dissipation; and/or introducing undesirable switching noises.
A method and circuit control a quiescent current of an amplifier including a preamplifier, error amplifiers coupled to the preamplifier, and output devices driven by the error amplifiers, the error amplifiers having an input-referred offset voltage. The method includes (a) applying a calibration voltage to an input of the error amplifiers, (b) calibrating a quiescent current of the output devices by changing the calibration voltage so that the calibrated quiescent current has a predetermined current value, the calibration voltage corresponding to the calibrated quiescent current being set as a correction voltage, and (c) operating the amplifier with the correction voltage applied to the input of the error amplifiers. The quiescent control circuit includes a correction voltage generator coupled to an input of the error amplifies, the correction voltage generator supplying a correction voltage to the input, a quiescent current detector coupled to an output of the error amplifiers, the quiescent current detector detecting a quiescent current flowing through the output devices, and a calibration circuit coupled to the quiescent current detector and to the correction voltage generator, the calibration circuit adjusting the correction voltage so that the quiescent current is calibrated to a predetermined current value.